A memory device used in a main memory of an information processing apparatus such as a server is formed from a semiconductor device, which is manufactured to have a defect in a case. The memory device in which an error is caused fixedly due to the defect or the memory device in which an error is caused through a simple test are removed in a delivery test. However, the memory device in which an error is caused in only a specific access pattern is sometimes delivered erroneously. In such a memory device, there is a case that an error is caused in the use state when the memory device is accessed in various patterns for a long time use. In this case, the cause is not found because of no reproducibility, and in another case, the error is caused only when a specific test program is executed for a long time so that analysis is difficult.
For this reason, a method is demanded of improving the reproducibility of an error which occurs only in a certain access pattern.
In conjunction with the above description, a history diagnosis method is disclosed in Japanese Patent Application Publication (JP-A-Showa 60-045853). According to this related art, address data and time data are accumulated.
Japanese Patent Application Publication (JP-A-Heisei 05-053929) discloses a central processing unit with a trouble data storage function. The central processing unit with a trouble data storage function has a trace data storage unit for storing an address and a data of an accessed main storage device therein, and a memory access trace control circuit for controlling read/write of the trace data storage memory.
Japanese Patent Application Publication (JP-A-Heisei 11-212835) discloses an electronic computer for extracting memory rewrite data and a memory control unit. According to the conventional technique, in the computer, a CPU for decoding and executing a program code in a memory, a high-speed storage device for storing memory rewrite data and process-related data therein, and a memory control unit for monitoring the rewrite of the data into the memory are connected to a system bus for data transfer among these devices. The memory rewrite data stored in the high-speed storage device includes buffer data such as a CPU identifier, a write address, memory contents before the write, an effective address and a timer value and additional data such as a process ID before process switching.